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Intel XMP Certified Memory

Part Number Decoder

The following information is designed to help you identify Kingston® HyperX® memory modules by specification.

Glossary of Terms

Capacity

Total number of memory cells on a module expressed in megabytes or gigabytes. For kits, the listed capacity is the combined capacity of all modules in the kit.

CAS latency

One of the most important latency (wait) delays (expressed in clock cycles) when data is accessed on a memory module. Once the data read or write command and the row/column addresses are loaded, CAS latency represents the final wait time until the data is ready to be read or written.

DDR3

Third generation of Double Data Rate (DDR) SDRAM memory. Similar to DDR2, it is a continuing evolution of DDR memory technology that delivers higher speeds (up to 1600MHz), lower power consumption and improved heat dissipation. It is an ideal memory solution for bandwidth-hungry systems equipped with dual and quad-core processors and the lower power consumption is a perfect match for both server and mobile platforms.

DDR2

Second-generation DDR memory technology. DDR2 memory modules are not backward-compatible with DDR due to the use of lower voltages, different pin configurations and incompatible memory chip technology.

Kit

A single package containing multiple memory modules: K2 = 2 modules in a kit.

Registered

A memory module containing Register chip(s) used to relay and synchronise address and control signals issued by the motherboard's memory controller, and a Phase Locked Loop (PLL) chip used to relay the motherboard's clock signal to all the DRAM chips.

Speed

The data rate or effective clock speed that a memory module supports.

LATENCY TIMING

The information below helps illustrate the appropriate settings when adjusting the memory timings in the motherboard BIOS for optimum performance. Please note that these settings may vary depending on the motherboard make/model or BIOS update.


Abbreviation

Definition

What it does

CL

CAS Latency

Delay between activation of row and reading a row

tRCD

RAS to CAS
(or RAS to Column Delay)

Activates row

tRP/tRCP

Row Precharge Delay
(or RAS Precharge Delay)

Deactivates row

tRA/tRD/tRAS

Row Active Delay
(or RAS Active Delay, or time to ready)

Number of clock cycles and between activation/deactivation of row

CMD Rate

Command rate

Delay between chip select and command

Note: All Kingston products are tested to meet our published specifications. Some system or motherboard configurations may not operate at the published HyperX memory speeds and timing settings. Kingston does not recommend that users attempt to run their computers faster than the published speed. Overclocking or modifying your system timing may result in damage to computer components.